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DEFINITY ECS Release 8.2 Maintenance for R8.2csi
555-233-119 Issue 1
April 2000
Maintenance Objects
3-617DS1-BD (DS1 Interface Circuit Pack)
3
End Loopback/Span Test (#1216)
This test is destructive.
The End Loopback/Span Test will terminate an active loopback or span test on a
TN767E DS1 circuit pack. Bit error counting against the received test pattern
stream is terminated and sending of the framed 3-in-24 test pattern is halted. If
either the CPE Loopback Jack or the far-end CSU is looped, the appropriate
loopback deactivate code is sent. If the loopback could not be deactivated, then
the test will FAIL and a MINOR alarm will be noted in the alarm log until the
loopback is cleared.
The test is highly destructive and can only be initiated by a system technician
demanded
test ds1-loop UUCSS end-loopback/span-test
command. Since only
one of these three different long-duration loopback/span tests can be active at a
time, the TN767E circuit pack knows which loopback/span test to terminate.
All trunks or ports on the DS1 Interface circuit pack must be busied out via the
system technician
busyout board
command before running this End
Loopback/Span Test.
0NO
BOARD
The test could not relate the internal ID to the port (no board).
This could be due to incorrect translations, no board is inserted, an incorrect
board is inserted, or an insane board is inserted.
1. Check to ensure that the board translations are correct. Use the add ds1
UUCSS command to administer the DS1 interface if it is not already
administered.
2. If board was already administered correctly, check the error log to
determine if the board is hyperactive. If this is the case, the board is shut
down. Reseating the board will re-initialize the board.
3. If the board was found to be correctly inserted in step 1, issue the
busyout board command.
4. Issue the reset board command.
5. Issue the release busy board command.
6. Issue the test board long command.
This should re-establish the link between the internal ID and the port.
Table 3-254. TEST #1215 Inject Single Bit Error Test — Continued
Error
Code
Te st
Result Description/ Recommendation
Continued on next page