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DEFINITY ECS Release 8.2 Maintenance for R8.2csi
555-233-119 Issue 1
April 2000
Maintenance Objects
3-1226UDS1-BD (UDS1 Interface Circuit Pack)
3
Translation Update Test (#146)
The Translation Update Test sends the circuit-pack-level information specified by
System Administration to the UDS1 Interface circuit pack. Translation includes
the following data administered for a UDS1 Interface circuit pack (see output of
display ds1 UUCSS
command): DS1 Link Length between two DS1 endpoints,
Synchronization Source Control, All Zero Suppression, Framing Mode, Signaling
Mode, Time Slot Number of 697-Hz Tone, Time Slot Number of 700-Hz Tone, etc.
In G3V3, if a TN464F or later UDS1 circuit pack is combined with a Lucent 120A1
CSU Module or the 401A T1 Sync Splitter to form an Integrated CSU Module/T1
Sync Splitter, this test will also send the administration for this Integrated CSU to
the circuit pack to assure the board’s translations are correct. The administration
of the CSU Module/T1 Sync Splitter is done using the DS1 circuit pack
administration form. Translation for the CSU Module/T1 Sync Splitter includes the
following data: Transmit LBO, Receive ALBO, Supply CPE Loopback Jack
Power?, etc.
Table 3-527. TEST #146 Translation Update Test
Error
Code
Test
Result Description/ Recommendation
ABORT Internal system error
1. Retry the command at 1-minute interval s a maximum of 5 times.
FAIL Internal system software error.
1. Enter the display ds1 UUCSS command to verify the UDS1 Interface
circuit pack translation.
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